TLA7PG2 Pattern Generator Module Features & Benefits:
- 64 Channel Modules with up to 2 Mb Vector Depth
- Up to 268 MHz Clock Rate
- Supports TTL/CMOS, ECL, PECL/LVPECL, LVDS, LVCMOS Standard Logic Levels
- Variable Probe for Supporting Variable Voltage Levels and Delay of Two
- Channels for Functional Verification
- Pattern Sequencing Control of Vector Output Allows Flexible Definition of Complex Events
- Works with all TLA700 Series Logic Analyzer Mainframes
- Digital Hardware Verification and Debug
- Digital Hardware Simulation and Debug
Breakthrough Solutions for Real-time Digital Systems Analysis Hardware and software engineers need the ability to generate digital stimuli to simulate infrequently encountered test conditions in hardware design and software program testing. A pattern generator enables you to perform functional verification, debugging and stress testing for system hardware design. This multi-channel, programmable pattern generator module with sequential control stimulates a prototype with data from a simulator for extended analysis. The pattern generator is ideal for designing systems where surrounding boards, ICs or buses that normally provide digital signals to the device under test are missing. With the pattern generator, you can place a circuit in a desired state, operate it at full speed, or single-step it through a series of states.
The TLA7PG2 features 64 channels and supports up to a 268 MHz clock rate for data output. The TLA7PG2 is made compatible with numerous voltage levels and technologies through the use of external pattern generator probes.
The TLA700 Series logic analyzers capture waveform data in a form that can be read by SynaptiCAD WaveFormer Pro, VeriLogger Pro, and TestBencher Pro software tools. SynaptiCAD's tools can convert the logic analyzer waveform data into stimulus vectors for VHDL, Verilog, SPICE, ABEL and pattern generators, including the TLA7PG2. This functionality gives engineers the ability to leverage the work done during the design phase of a product, simplifying the development of a hardware test environment that provides complete test coverage and excellent debug capability.