Description
Bit Error Rate Tester
Pattern Generator
Frequency Range:
* Internal Clock Source: 150 Kb/s to 700 Mb/s
* External Clock: 150 Kb/s to 700 Mb/s
Freq. Resolution (Internal Clock): 1 kHz
Clock Output Amplitude: 500 mV to 2.0 Vp-p
Clock Output Offset: -2.0 V to 1.8 V
Data Output Amplitude: 500 mV to 2.0 Vp-p
Data Output Offset: -2.0 V to 1.8 V
Data Delay Range: ±4 ns
Data Delay Increments: 20 ps
Clock Delay: ±4 ns
PRBS Patterns (2n -1): 7, 15, 17, 20, 23
Error Detector
Frequency Range with Burst Mode: 150 Kb/s to 700 Mb/s
Clock Input Levels (max): 500 mV to 6.0 Vp-p
Clock Input Terminations: GND, -2 V, +3 V or floating
Clock Input Threshold: 3.00 to +4.5 V
Data Input Levels (max): 500 mV to 6.0 Vp-p
Data Input Threshold: 3.00 to +4.5 V
Data Input Terminations: GND, -2 V, +3 V or floating