The TLS216 Logic Scope is designed to simplify the task of debugging digital hardware. The Logic Scope seamlessly combines in a single instrument the analog acquisition system of a high-speed digital storage oscilloscope (DSO) with the triggering and display systems of a logic analyzer. The 500 MHz bandwidth Logic Scope samples all channels simultaneously at 2 GS/s and has sophisticated time-qualified triggering, a high resolution color display and an integrated floppy disk drive.
Sophisticated Triggering to Identify Complex Digital Problems
In addition to edge trigger, most digital signals can be easily captured using pulse, glitch and pattern triggers. The Logic Scope provides two new trigger resources that allow the instrument to directly trigger on common digital circuit behavior. The industry's first time-interval or sequence trigger type monitors the time between two events, allowing the instrument to easily trigger on setup time violations, hold-time violations or unexpected propagation delay. The powerful "Time-out" trigger type can be used to capture incomplete handshake sequences or to trigger the instrument when the DUT "hangs".All of these trigger types let developers identify channel-to-channel relationships, including 16-Bit patterns and time-related/time-qualified system faults. The Logic Scope's external trigger-input can be used as a "Trigger Arm" to enhance cross-triggering between two instruments, simplifying the task of using a Logic Scope with other test equipment.
Low-mass FET Probes Ensure Nonintrusive Connection
The Logic Scope includes a set of 16 specially designed probes that have extremely low probe-tip mass (1.5 grams) and input capacitance (2.5 pF). The P6240 low probe-tip mass ensures that connections made to surface mount and fine pitch ICs will be reliable. The low input capacitance, combined with the 1 megaohm input resistance, decreases the effect of the probe on the DUT's operation, allowing very accurate measurements to be made with confidence.These characteristics are made possible by using a "podlet-style" probe-tip design instead of the "pencil-style" design of traditional oscilloscope probes. Employing the de facto industry standard of 0.1 inch spacing between the signal and ground inputs, each 0.1 inch thick podlet can directly attach to the hundreds of readily available IC adapters and clips.
16 Input Channels
2 GS/s Simultaneous Sampling on All Channels
<±100 ps Timing Resolution
500 MHz Real-time Bandwidth Oscilloscope
Logic Family Presets for TTL, ECL and CMOS
2.5 pF, 1 megaohm Podlet Style FET Probes
Display Modes: Analog, Timing Diagram and BusForm
Sophisticated Time Qualified Triggering with Four Word Recognizers
GPIB, RS-232 interface and Centronics printer port