The Stanford Research SIM964 Analog Limiter provides upper and lower voltage limits for conditioning dynamic signals. Limits are set between Tone10 V with 10 mV resolution. Two rear-panel TTL signals are activated when upper or lower limits are exceeded. The SIM964 uses SRS’s clock-stopping architecture design to eliminate digital noise artifacts. The low output noise and low harmonic distortion of the SIM964 make it ideal for many applications.